During my engineering studies days, I studied the book "Computer System Architecture (3rd ed.)" written by M. Morris Mano. This book was phenomenal in my life because it taught me exactly where the hardware meets the software. This book helped me to understand exactly how the hardware fetches, decodes and executes the software on a physical electronic circuit. In fact, I liked this book so much that I implemented the theoretical machine described in the book (called Mano Machine by many) on a Xilinx XC9572 PC84 CPLD Trainer kit.

See https://github.com/susam/mano-cpu for the VHDL source code that implements the Mano Machine. The file report.pdf contains a description of the work which is mostly a gist of the portions of the book relevant to my implementation of the machine and some additional description of my implementation. I did not make any assembler or compiler for it, so I had to push DIP switches on the kit to load instructions on a RAM (implemented on another kit) to program the CPU and test it.

I recommend this book to anybody who wants to understand the basics of how a CPU is implemented in its hardware form.

This one looks like it's from the 90s, are there any books out there that cover more recent developments? Out of order pipelines and the like seem pretty complicated to execute on

EDIT: It seems like the third edition is from 2008

So giant computers are a thing again? :-) Of the three so far this year I like the giant 6502[1] for "wow", the giant 80/20 thing[2] for presentation, and this one gets honorable mention for an simplified construction.

[1] http://monster6502.com/

[2] http://www.megaprocessor.com/

If this sort of thing interests you, there is a book along a similar vein titled "The Elements of Computing Systems: NAND to Tetris".

It has you build a virtual computer from the logic gates up -- with each chapter moving up a layer of abstraction.

Fun fact: the simplified ISA and language for this machine were designed by David May[1], who was the architect of the highly-parallel Transputer[2] in the 1980s.

The Hex machine inherits a few features from the Transputer, including the PFIX and NFIX instructions - a rather unique way of loading arbitrary-length registers using only instructions that have a fixed 4-bit operand.

[1] https://en.wikipedia.org/wiki/David_May_(computer_scientist)

[2] https://en.wikipedia.org/wiki/Transputer

Interesting level of modularity; it's almost exactly the same granularity as FPGAs. The "logic unit" in https://bighexmachine.github.io/hexModuleSpec/ reminds me of a LUT element.

The two-phase clock looks interesting as well.

Are all of those ethernet cables? I can't say I know much about wiring, but that seems like a bit overkill.

Looks like they are. Actually a good idea IMO assuming they are just using them as robust 8 bit interconnects and not actually Ethernet.

Considering two of the bits will have large coupling between the two, that sounds like a bad idea...

A 4 bit differential output would be pretty darn good.

Actually, that might be the case: some boards have 4 presumably output ethernet ports.

edit: https://bighexmachine.github.io/hexModuleSpec/ looks like I'm right?

They are, and the interconnects are 4 bit. These were used by first year undergraduates for years before the Big Hex Machine was built, so sturdy Ethernet cables were cheaper and more reliable than many other options.

Yup, we used 4 wires for data and 4 for power - there's a 12V supply which is spread around and downregulated to 5V on each board. We picked ethernet because it's extremely cheap, hard-wearing, widely available and has enough wires to play with.

Really, it beats having to fab your own connectors. Making your own isn't a big deal for most projects, but with that number of boards, this is a smart choice.

Little known fact: the Big Hex Machine comes complete with Nyan Cat.

https://bighexmachine.github.io/nyan.html

There is a noticeable lack of any logical operations - I suppose this doesn't have an ALU, but an AU. It sounds like a possible exercise for the students to implement a compiler that can handle the other operators in C; it is Turing-complete after all. ;-)

It has got load, store, add, sub, branch, in and out. That is the brainf* instruction set. I didn't look at the memory architecture, so the implementation might not be straight forward. At low buswidth and size constrained, handcrafted assembler is more efficient, though.

I guess that's what makes it a Hex machine.

Pretty cool