>Regarding the use in mobile and desktop, it will have to wait until SIMD extensions are introduced
I'm little confused about this talk and comments in here relating to open source in high performance applications (desktop, servers etc).
The RISC-V ISA is open source, I get that. There can also be open source Verilog/VHDL designs available. They are probably good for small low performance IoT applications and old processes.
But there is long way from ISA to silicon in high performance VLSI processor design for a new processes and foundries. Architecture, logic synthesis, timing analysis, floor planning, routing and placement, and ungodly amount of testing .. I don't see anyone spending hundreds of millions of chip design for RISC-V ISA and open sourcing it.
In other words, if you want competitive RISC-V chip, some company must spend hundreds of millions to develop their own RISK-V chip architecture and they will not open source it.
> In other words, if you want competitive RISC-V chip, some company must spend hundreds of millions to develop their own RISK-V chip architecture...
I wonder if a country like Russia, wanting something that they can deploy without worrying that the NSA & Intel are cooperating on state spying, will eventually try and take something like this and bootstrap a domestic semiconductor line of business.
Russians have build their own processors for decades. They have used SPARC instructions sets and they also have their own VLIW Elbrus 64-bit ISA and processors are made by TSMC for 28 nm process. It has Intel x86 comparability with system-level dynamic translation.
Just adopting new Instruction Set Architecture (ISA) is not going to help to magically boost semiconductor business.
The Russians have Baikal (T1), the Chinese have Loongson (3A/B). Both are MIPS based. Unfortunately, even though both announced that there will be consumer hardware available over a year ago, it did not happen. So I'm not too optimistic regarding RISC-V.
I'm little confused about this talk and comments in here relating to open source in high performance applications (desktop, servers etc).
The RISC-V ISA is open source, I get that. There can also be open source Verilog/VHDL designs available. They are probably good for small low performance IoT applications and old processes.
But there is long way from ISA to silicon in high performance VLSI processor design for a new processes and foundries. Architecture, logic synthesis, timing analysis, floor planning, routing and placement, and ungodly amount of testing .. I don't see anyone spending hundreds of millions of chip design for RISC-V ISA and open sourcing it.
In other words, if you want competitive RISC-V chip, some company must spend hundreds of millions to develop their own RISK-V chip architecture and they will not open source it.