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This is an undocumented feature, from what I gather. So it's missing the "bait" part of "bait and switch".


It's not even undocumented, but explicitly a documented as a feature those CPUs don't have. Originally it was supposed to be fused off physically, I wonder why it wasn't.


To get the positive wave of initial reviews from people who enable it.


Who did this? Phoronix got AVX-512 working, but was very clear that this was unexpected and had a good chance of going away before release. If anything, this is a better test for your reviewers -- if a reviewer has published benchmarks using these unsupported features without mentioning it, you should keep that in mind when listening to their reviews in the future.


It could be that decision to not support AVX512 was made very late in product development and thus early batches didn't have chicken bit disabled or/and fused it off.

There might be gazillions of reason why this was done.


Easier to sell the same product twice just by flipping a bit in software


I'm not sure if benchmarks that are out have the AVX-512 enabled or not.

If they do then this is indeed fraud.

They can always claim that those were engineering samples and not meant to be tested, but, I think they knew.

But: that's assuming a lot. It's possible that the ES chips sent to reviewers also had AVX-512 disabled, and that benchmarks did not make use of the instruction anyway.


> I'm not sure if benchmarks that are out have the AVX-512 enabled or not.

No, because half the cores on those don't even have AVX-512 in the first place. (to enable AVX-512, you have to disable all the eCores)

As such, running those systems with AVX-512 turned on was academic, but not practically used.


The performance benchmarks of the Alder Lake is far from undocumented at this point.


You had to explicitly turn it on through hacks in the BIOS some motherboard makers added. If people enable a feature that's explicitly not supported on their benchmark rigs without disclosing it, that's not the vendors fault.




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